B.Tech in Electronics & Communication at IIIT Nagpur. Architecting mission-critical RTL designs and high-performance digital systems.
B.Tech in Electronics & Communication at IIIT Nagpur. Architecting mission-critical RTL designs and high-performance digital systems.
Architecting Ethernet-based QSPI systems for JTAG-free remote bitstream updates.
Optimized RTL for symbol sync & AGC modules on Zynq-7000 with 15% faster convergence.
Top 2% in TrackShift 2025 Innovation Challenge, supported by HAAS F1.
Bitmapper Technologies, Pune
National Remote Sensing Center (ISRO)
SystemVerilog, Vivado, EDA Playground
Remapping virtual addresses to physical hardware in real-time. Validated start/address/data/stop sequences with SystemVerilog testbenches.
Verilog, BASYS3, ADS 2110 ADC
FPGA-based DSP system for quadriplegic patients. Reduced noise interference by 30% via custom signal processing algorithms.
Real-time Syndrome-Based Error Correction Logic